As a method for transmitting data utilizing serial transmission, there is a character broadcast system by which character broadcast data are transmitted in vertical blanking intervals of video signals.
There are various kinds of character broadcast systems that employ different superimposition lines upon which character broadcast data (character broadcast serial data) are superimposed, or transmission clocks of different frequencies, and various kinds of analog video signals on which the character broadcast serial data are superimposed are transmitted at present in various regions over the world.
A character broadcast analog video signal (see S140 in FIG. 11) is a signal including a horizontal sync signal A that indicates start of a horizontal blanking interval, a color burst signal B for color reproduction, a clock run-in (hereinafter, referred to as CRI) signal C that is a reference waveform and employed to set a slice level for binarizing a signal, a framing code signal D that indicates the character broadcast type, and a text data signal E including character broadcast data to be transmitted. Hereinafter, a period in which the slice level is set on the basis of the CRI signal C is referred to as a CRI detection period, a period in which the frame code signal D is received is referred to as a framing code period, and a period in which the text data signal E is received is referred to as a text data period.
The data unit of the character broadcast serial data is composed of 8 bits, and one bit among these 8 bits is a parity bit that is added to detect the presence or absence of decoding errors. The character broadcast system employs a method by which the presence or absence of decoding errors is checked on the basis of whether or not an odd number of “1” are included in each unit of decoded data, and accordingly data of 8 bits which include an odd number of “1” are transmitted. Thus, when actual data includes only an even number of “1”, the parity bit is set at “1” so that each data unit includes an even number of “1”.
When characters that are superimposed upon such an analog video signal are to be displayed, the received analog video signal is initially binarized by a data slicer to extract character broadcast data in accordance with a transmission clock, thereby extracting character broadcast serial data.
Hereinafter, the construction and operation of the conventional data slicer will be described with reference to FIG. 10.
As shown in FIG. 10, the conventional data slicer 500 includes an A/D converter 120 for converting an analog video signal S110 inputted through a video signal input terminal 110, upon which character broadcast serial data are superimposed, into a digital video signal S120; a CRI detection unit 130 for generating a CRI detection range signal S132 that indicates a CRI detection period on the basis of the digital video signal S120; a low-pass filter (hereinafter, referred to as LPF) 140 that eliminates noises from the digital video signal S120 and outputs a digital video signal S140; a slice level calculation unit 510 that sets a slice level on the basis of the digital video signal S140 which is inputted during the CRI detection period; a data slicing unit 220 that binarizes the digital video signal S140, using the slice level that is set by the slice level calculation unit 510; and a decoding circuit 230 that converts the binarized serial data into parallel data to perform a decoding process, and outputs decoded data S230 to outside the data slicer 500 through a video signal output terminal 190.
The CRI detection unit 130 includes a sync separation circuit 131 that separates a vertical sync signal S131a and a horizontal sync signal S131b from the digital video signal S120; and a CRI detection range signal generation circuit 132 that outputs a CRI detection range signal S132 that indicates a predetermined line and position as a detection period for a CRI signal C, on the basis of the vertical sync signal S131a and the horizontal sync signal S131b. 
The slice level calculation unit 510 includes a falling detection circuit 151 that outputs a falling detection pulse S151 when detecting a falling of the digital video signal S140 in the CRI detection period; a frequency calculation circuit 152 that calculates the frequency of the digital video signal S140 on the basis of the falling detection pulse S151, and outputs frequency data S152; a frequency evaluation circuit 153 that compares the frequency data S152 with previously-held frequency data of a CRI signal C for the character broadcast system, and outputs a frequency evaluation gate pulse S153 during a period in which the frequency data S152 corresponding to a predetermined character broadcast system are outputted; and a CRI evaluation circuit 154 that extracts a pulse corresponding to a falling of the predetermined character broadcast system from the fall detection pulse S151, and outputs a frequency evaluation pulse S154. The slice level calculation unit 510 further includes a maximum/minimum retrieval circuit 155 that retrieves the maximum and minimum values of the amplitude of the digital video signal S140 during the CRI detection period, and outputs maximum value retrieval data S155a and minimum value retrieval data S155b; and an average calculation circuit 511 calculating the average amplitude of the digital video signal S140 on the basis of the maximum value retrieval data S155a and the minimum value retrieval data S155b, with employing the frequency evaluation pulse S154 as a load pulse, and outputs the calculated average as slice level data S511 to the data slicing unit 220.
The data slicing unit 220 includes a binarization circuit 221 that performs threshold evaluation using the slice level data S511 (i.e., determines whether the digital video signal S140 is larger or smaller than the slice level data S511) to binarize the digital video signal S140, and outputs binarized data S221 to an extraction circuit 222; and an extraction circuit 222 that extracts character broadcast serial data from the binarized data S221 in timing of an extraction pulse S162 that is generated by an extraction pulse generation circuit 162, and outputs extracted serial data S222.
Next, the operation of the conventional data slicer 500 that is constructed as described above will be described with reference to figures.
A timing chart that illustrates the operation of the conventional data slicer 500 is shown in FIG. 11. In FIG. 11, the same or corresponding elements as those in FIG. 10 are denoted by the same reference numerals. Further, reference character A denotes a horizontal sync signal, B denotes a color burst signal, C denotes a CRI signal, D denotes a framing code signal, E denotes a text data signal, and T31 to T36 denote times when signals included in the digital video signal S140 vary.
When an analog video signal S110 upon which character broadcast serial data are superimposed is inputted through the video signal input terminal 110, the A/D converter 120 samples the analog video signal S110 using a sampling clock fs (MHz) to convert the same into a digital signal, and outputs the digital video signal S120 to the CRI detection unit 130 and the LPF 140. Then, the LPF 140 eliminates noises from the digital video signal S120, and outputs a resultant digital video signal S140 to the slice level calculation unit 510 and the data slicing unit 220. FIG. 11 shows an example of the digital video signal S140 that is obtained by A/D-converting the analog video signal S110 and eliminating noises therefrom. In this FIG. 11, black dots show the digital video signal S120 (S140) which is obtained by sampling the analog video signal S110 using the sampling clock fs.
At time T31, the digital video signal S120 including a horizontal sync signal A and a vertical sync signal is inputted to the CRI detection unit 130. Then, the sync separation circuit 131 separates a vertical sync signal S131a and a horizontal sync signal S131b from the digital video signal S120.
Next, the CRI detection range signal generation circuit 132 obtains a start position (time T32) and an end position of the CRI signal C on the basis of the vertical sync signal S131a and the horizontal sync signal S131b, and outputs a CRI detection range signal S132 to the fall detection circuit 151 and the maximum/minimum retrieval circuit 155 during the CRI detection period.
During a predetermined time period in the period while the CRI detection range signal S132 is outputted, the digital video signal S140 including the CRI signal C is inputted to the slice level calculation unit 510, and then the slice level calculation unit 510 performs a slice level calculation process on the basis of the inputted CRI signal C. To calculate the slice level, the falling detection circuit 151 retrieves failings of the digital video signal S140, and the maximum/minimum retrieval circuit 155 retrieves the maximum and minimum values of the digital video signal S140, and outputs maximum value retrieval data S155a and minimum value retrieval data S155b. 
At time T33, the falling detection circuit 151 detects a first falling of the CRI signal C, and outputs a falling detection pulse S151 to the frequency calculation circuit 152 and the CRI evaluation circuit 154. At time T34, the falling detection circuit 151 detects the second falling of the CRI signal C, and outputs the falling detection pulse S151 to the frequency calculation circuit 152 and the CRI evaluation circuit 154.
Then, the frequency calculation circuit 152 calculates the frequency of the CRI signal C from the falling detection pulses S151 which are detected at times T33 and T34, and outputs frequency data S152 to the frequency evaluation circuit 153. On the basis of the frequency data S15, the frequency evaluation circuit 153 determines whether the falling that is detected by the falling detection circuit 151 corresponds to a signal that is compliant with the predetermined character broadcast system or not. For example, when a falling due to noises is detected, the frequency data S152 is different from the frequency of the character broadcast system, and thus the frequency evaluation circuit 153 determines that this is frequency data which is not compliant with the predetermined character broadcast system. When the frequency data S152 is the frequency of the predetermined character broadcast system, the frequency evaluation circuit 153 outputs the frequency evaluation gate pulse S153 to the CRI evaluation circuit 154.
Then, on the basis of the frequency evaluation gate pulse S153, the CRI evaluation circuit 154 determines whether the falling detection pulse S151 is a pulse that is compliant with the character broadcast system or not. The falling detection pulse S151 during a period in which the frequency evaluation gate pulse S153 is outputted is a pulse that is compliant with the character broadcast CRI signal C, and the CRI evaluation circuit 154 extracts the corresponding pulse and outputs the frequency evaluation pulse S154 to the average calculation circuit 511.
The average calculation circuit 511 samples the maximum value retrieval data S155a and the minimum value retrieval data S155b, with utilizing the frequency evaluation pulse S154 as a load pulse, and calculates the average value of the CRI signal C. Then, the average calculation circuit 511 outputs the calculated average value to the data slicing unit 220 as slice level data S511. Here, a slice level SLV10 which is set on the basis of the slice level data S511 is an appropriate slice level that can be employed when the framing code signal D and the text data signal E are binarized after time T35.
When the digital video signal S140 including the framing code signal D is inputted to the data slicing unit 220 at time T35, the binarization circuit 221 determines whether the digital video signal S140 is higher or lower than the slice level data S511 to binarize the signal into “0” or “1”, thereby generating binarized data S221. Then, the extraction circuit 222 extracts character broadcast serial data from the binarized data S221, in accordance with an extraction pulse S162 that is outputted from the extraction pulse generation circuit 162, and outputs extracted serial data S222. The decoding circuit 230 converts the extracted serial data S222 into parallel data, and obtains a framing code.
When the digital video signal S140 including a text data signal E is inputted to the data slicing unit 220 at time T36, the binarization circuit 221 binarizes the digital video signal S140 using the slice level data S511, to generate binarized data S221, like in the case including the framing code signal D. Then, the extraction circuit 222 extracts character broadcast serial data from the binarized data S211 in accordance with the extraction pulse S612, and outputs the extracted serial data S222 to the decoding circuit 230. The decoding circuit 230 converts the extracted serial data S22 into parallel data, then carries out a decoding process depending on the type of the character broadcast, which is indicated by the framing code, and outputs decoded data S230 through the video signal output terminal 190.
The decoded data that are outputted from the video signal output terminal 190 are transferred to a display circuit (not shown), and displayed as characters.
However, the analog video signal S110 that is inputted from the video signal input terminal 110 may include distortion resulting from group delay or reduction in electric field strength in a transmission system. The conventional data slicer is adversely affected by noises due to the distortion, and accordingly, when the analog video signal S140 is distorted, the accuracy of the slice level data S511 that is calculated by the slice level calculation unit 510 is lowered, whereby an appropriate slice level data S511 cannot be obtained. Consequently, the binarization circuit 211 binarizes the digital video signal S140 into an incorrect value, so that the occurrence rate of decoding errors gets higher at the decoding process for the binarized data S211.
Hereinafter, a description will be given of the operation of the conventional data slicer 500 in a case where a distorted analog video signal S110 is inputted thereto, with reference to the drawings.
FIG. 12 shows the operation of the conventional data slicer 500 in the case where an analog video signal S110 that is distorted due to group delay or reduction in the electric field strength is inputted thereto. In FIG. 12, the same or corresponding elements as those in FIG. 11 are denoted by the same reference numerals. Reference characters T41 to T46 denote times when signals included in the digital video signal vary.
When the analog video signal S110 is inputted through the video signal input terminal 110, the A/D converter 120 converts the analog video signal S110 into a digital signal, and outputs the digital video signal S120 to the CRI detection unit 130 and the LPF 140. Then, the LPF 140 eliminates noises from the digital video signal S120, and outputs a resultant digital video signal S140 to the slice level calculation unit 510 and the data slicing unit 220. FIG. 12 shows an example of the digital video signal S140 that is obtained by A/D-converting the distorted analog video signal S110 and eliminating noises from the converted signal. Further, reference character C′ denotes noises which occur during a period in which the CRI detection range signal S132 is outputted, and cannot be eliminated by the LPF 140. The reason why the digital video signal S140 is distorted even when the noise elimination is performed by the LPF 140 is that this video signal is affected by noises that cannot be eliminated even by the LPF 140. Further, black dots in FIG. 12 show the digital video signal S120 (S140) which is obtained by sampling the analog video signal S110 using the sampling clock fs.
At time T41, the digital video signal S120 including a horizontal sync signal A and a vertical sync signal is inputted to the CRI detection unit 130, and then the sync separation circuit S131 separates the vertical sync signal S131a and the horizontal sync signal S131b from the digital video signal S120.
At time T42, the CRI detection range signal generation circuit 132 obtains a start position and an end position of the CRI signal C on the basis of a vertical sync signal S131a and a horizontal sync signal S131b, and outputs a CRI detection range signal S132 during the CRI detection period.
While the CRI detection range signal generation circuit 132 is outputting the CRI detection range signal S132, the slice level calculation unit 510 calculates a slice level on the basis of the CRI signal C. While the CRI detection range signal S132 is being inputted to the slice level calculation unit 510, the falling detection circuit 151 retrieves a falling of the digital video signal S140, and the maximum/minimum retrieval circuit 155 retrieves the maximum and minimum values of the digital video signal 140.
At time T43, the falling detection circuit 151 erroneously detects a falling of the noises C′ in the digital video signal S140 as a falling of the CRI signal C, and generates a falling detection pulse S151. Also at time T44, the falling detection circuit 155 erroneously detects a falling of the noise C′ in the digital video signal S140 as a falling of the CRI signal C, and generates a falling detection pulse S151.
Then, the frequency calculation circuit 152 calculates the frequency of the digital video signal S140 on the basis of the falling detection pulses that are detected at time T43 and T44, and output frequency data S152. On the basis of the calculated frequency data S152, the frequency evaluation circuit 153 determines whether the failings that are detected by the falling detection circuit 151 correspond to a signal that is compliant with the predetermined character broadcast system or not. When the interval between fallings of noises C′ is equal to the interval between failings of the CRI signal C, like the digital video signal S140 shown in FIG. 12, the frequency evaluation circuit 153 erroneously determines that the frequency of the noises C′ is a frequency that is compliant with the predetermined character broadcast system, and outputs the frequency evaluation gate pulse S153 to the CRI evaluation circuit 154. Further, on the basis of the frequency evaluation gate pulse S153, the CRI evaluation circuit 154 erroneously determines that the falling detection pulse S151 is a pulse which is compliant with the character broadcast, and outputs a frequency evaluation pulse S154.
The average calculation circuit 511 samples the maximum value retrieval data S155a and the minimum value retrieval data S155b, using the frequency evaluation pulse S154 as a load pulse, and calculates the average value of the noise C′ in the CRI signal C. Then, the average calculation circuit outputs the calculated average to the data slicing unit 220 as slice level data S511. A slice level SLV11 that is set on the basis of the slice level data S511 calculated using the noise C′ is lower than the slice level SLV10 that is set using the CRI signal C including no distortion.
At times T45 and T46, the CRI signal C is detected. The falling detection circuit 151 detects the first falling of the CRI signal C at time T45, then detects the second falling of the CRI signal C at time T46, and outputs falling detection pulses S151. The maximum/minimum retrieval circuit 155 retrieves the maximum and minimum values of the digital video signal S140, and outputs maximum value retrieval data S155a and minimum value retrieval data S155b. In the digital video signal S140 shown in FIG. 12, the maximum value of the noises C′ is smaller than the minimum value of the CRI signal C, so that the minimum value retrieval data S155b is not updated by the CRI signal C, and thus the minimum value of the noises C′ is continuously outputted.
As the frequency that is calculated by the frequency calculation circuit 152 on the basis of the falling detection pulses that are detected at times T45 and T46 is a frequency conforming to the character broadcast system, the frequency evaluation pulse S154 is inputted to the average calculation circuit 511. The average calculation circuit 511 samples the maximum value retrieval data S155a and the minimum value retrieval data S155b using the frequency evaluation pulse S154 as a load pulse, and calculates the average value of the digital video signal S140. Then, the average calculation circuit outputs the calculated average to the data slicing unit 220 as slice level data S511.
However, since the minimum value retrieval data S155b is the minimum value of the noise C′, a slice level SLV12 that is set on the basis of the slice level data S511 is improperly lower than an appropriate level. Consequently, the binarization circuit 211 performs binarization using the slice level data that is lower than the appropriate level, so that it may binarize the framing code signal D and the text data signal E into improper values. Accordingly, when extracted serial data S222 that are extracted from binarized data S221 in accordance with an extraction pulse S162 are decoded by the decoding circuit 230, decoding errors may occur.
Further, as the slice level calculation is performed only in the CRI detection period, improper slice level data are obtained when the shape of the digital video signal S140 varies after the CRI signal C. Consequently, the binarization circuit 221 binarizes the signal into an improper value, whereby the probability of occurrence of decoding errors is increased.
Further, when a waveform equalization filter is used to correct distortion of the waveform in the transmission system, the circuit scale is so large that the circuit scale of the data slicer is adversely increased.